
71V124SA10PHGI8
Obsolete3.3V 128K X 8 ASYNCHRONOUS STATIC RAM CENTER POWER & GROUND PINOUT
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71V124SA10PHGI8
Obsolete3.3V 128K X 8 ASYNCHRONOUS STATIC RAM CENTER POWER & GROUND PINOUT
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Technical Specifications
Parameters and characteristics for this part
| Specification | 71V124SA10PHGI8 |
|---|---|
| Access Time | 10 ns |
| Memory Format | SRAM |
| Memory Interface | Parallel |
| Memory Organization | 128K x 8 |
| Memory Size | 1 Mbit |
| Memory Type | Volatile |
| Mounting Type | Surface Mount |
| Operating Temperature [Max] | 85 °C |
| Operating Temperature [Min] | -40 °C |
| Package / Case | 32-SOIC |
| Package / Case [x] | 0.4 in |
| Package / Case [y] | 10.16 mm |
| Supplier Device Package | 32-TSOP II |
| Technology | SRAM - Asynchronous |
| Voltage - Supply [Max] | 3.6 V |
| Voltage - Supply [Min] | 3.15 V |
| Write Cycle Time - Word, Page | 10 ns |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
Description
General part information
71V124 Series
The 71V124 3.3V CMOS SRAM is organized as 128K x 8. The JEDEC center power/GND pinout reduces noise generation and improves system performance. All bidirectional inputs and outputs of the 71V124 are LVTTL-compatible and operation is from a single 3.3V supply. Fully static asynchronous circuitry is used; no clocks or refreshes are required for operation.
Documents
Technical documentation and resources