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Renesas Electronics Corporation
| Series | Category | # Parts | Status | Description |
|---|---|---|---|---|
| Part | Spec A | Spec B | Spec C | Spec D | Description |
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| Series | Category | # Parts | Status | Description |
|---|---|---|---|---|
| Part | Spec A | Spec B | Spec C | Spec D | Description |
|---|---|---|---|---|---|
| Part | Program Memory Size | Number of I/O | Core Processor | Qualification | Peripherals | RAM Size | Core Size | Voltage - Supply (Vcc/Vdd) [Max] | Voltage - Supply (Vcc/Vdd) [Min] | Mounting Type | Speed | Supplier Device Package | Grade | Oscillator Type | Package / Case | Data Converters | EEPROM Size | Program Memory Type | Operating Temperature [Max] | Operating Temperature [Min] | Connectivity | Current Transfer Ratio (Min) [Min] | Current Transfer Ratio (Max) | Output Type | Current - Output / Channel | Rise / Fall Time (Typ) [custom] | Rise / Fall Time (Typ) [custom] | Number of Channels | Current - DC Forward (If) (Max) [Max] | Voltage - Forward (Vf) (Typ) | Vce Saturation (Max) [Max] | Input Type | Package / Case [x] | Package / Case [y] | Voltage - Supply [Min] | Voltage - Supply [Max] | Type | Features | Interface | Current - Timekeeping (Max) [Max] | Current - Timekeeping (Max) [Min] | Voltage - Supply, Battery [Min] | Voltage - Supply, Battery [Max] | Time Format | Data Converters [custom] | Data Converters [custom] | Data Converters [custom] | Differential - Input:Output | Output | Number of Circuits | PLL | Ratio - Input:Output [custom] | Ratio - Input:Output [custom] | Divider/Multiplier | Package / Case | Package / Case [custom] | Input | Core Size [Min] | Core Size [Max] |
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Renesas Electronics Corporation | 1 MB | 33 I/O | RH850G3KH | AEC-Q100 | DMA PWM WDT | 128 K | 32-Bit Single-Core | 5.5 V | 3 V | Surface Mount | 120 MHz | 48-LFQFP | Automotive | Internal | 48-QFP | 4x10b 8x12b | 64 K | FLASH | 105 °C | -40 °C | |||||||||||||||||||||||||||||||||||||||
Renesas Electronics Corporation | 96 KB | 37 | RL78 | LVD POR PWM WDT | 12 K | 16-Bit | 5.5 V | 1.6 V | Surface Mount | 32 MHz | 44-LQFP (10x10) | Internal | 44-LQFP | 10b 12b A/D 10x8 D/A 2x8b | 8 K | FLASH | 85 °C | -40 °C | CSI I2C LINbus SPI UART/USART | ||||||||||||||||||||||||||||||||||||||||
Renesas Electronics Corporation | Surface Mount | 4-SMD | 4-SMD Gull Wing | 100 °C | -55 °C | 130 % | 260 % | 1.81 mOhm | 50 mA | 5 µs | 3 µs | 1 | 80 mA | 1.17 V | 300 mV | DC | |||||||||||||||||||||||||||||||||||||||||||
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Renesas Electronics Corporation | Surface Mount | 14-SOIC | 70 °C | 0 °C | 0.154 in | 3.9 mm | 2.7 V | 5.5 V | Clock/Calendar | Alarm Leap Year Supervisor Watchdog Timer | 2-Wire Serial I2C | 20 µA | 10 µA | 1.8 V | 5.5 V | HH:MM:SS (12/24 hr) | |||||||||||||||||||||||||||||||||||||||||||
Renesas Electronics Corporation | 128 KB | 82 | RXv3 | DMA LVD POR PWM WDT | 64 K | 32-Bit | 5.5 V | 2.7 V | Surface Mount | 120 MHz | 100-LFQFP (14x14) | Internal | 100-LQFP | A/D 22x12b D/A 2x12b | 16 K | FLASH | 85 °C | -40 °C | CANbus I2C SCI SPI UART/USART | ||||||||||||||||||||||||||||||||||||||||
Renesas Electronics Corporation | 256 KB | 31 | RL78 | DMA LVD POR PWM WDT | 24 K | 16-Bit | 5.5 V | 1.6 V | Surface Mount | 32 MHz | 44-LQFP (10x10) | Internal | 44-LQFP | 8 K | FLASH | 85 °C | -40 °C | CSI I2C LINbus UART/USART | 2x8b | 10x8 | 10b | ||||||||||||||||||||||||||||||||||||||
Renesas Electronics Corporation | Surface Mount | 48-TSSOP | 48-TFSOP | 85 °C | -40 °C | 3.15 V | 3.45 V | Clock Generator | No/Yes | Clock | 1 | 14 | 22 | Yes/No | 0.24 in | 6.1 mm | Clock Crystal | ||||||||||||||||||||||||||||||||||||||||||
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Renesas Electronics Corporation | 1 MB | 120 | R32C/100 | DMA LVD PWM WDT | 63 K | 5.5 V | 3 V | Surface Mount | 50 MHz | 144-LFQFP (20x20) | Internal | 144-LQFP | A/D 34x10b D/A 2x8b | 8 K | FLASH | 85 °C | -40 °C | CANbus EBI/EMI I2C IEBus UART/USART | 16 Bit | 32 Bit |
| Series | Category | # Parts | Status | Description |
|---|---|---|---|---|
| Memory | 17 | 1 | The 71V3557 3.3V CMOS Synchronous SRAM is organized as 128K x 36. It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus it has been given the name ZBTTM, or Zero Bus Turnaround. The 71V3557 contains address, data-in... Read More | |
| Integrated Circuits (ICs) | 14 | 1 | The 71V3558 3.3V CMOS synchronous SRAM, organized as 256K x 18, is designed to eliminate dead bus cycles when turning the bus around between reads and writes or writes and reads. Thus, it has been given the name ZBT™, or Zero Bus Turnaround. The 71V3558 contains data I/O, address, and... Read More | |
| Integrated Circuits (ICs) | 22 | 8 | The 71V3559 3.3V CMOS Synchronous SRAM is organized as 256K x 18. It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus it has been given the name ZBTTM, or Zero Bus Turnaround. The 71V3559 contains address, data-in... Read More | |
| Integrated Circuits (ICs) | 7 | 1 | The 71V3576 3.3V CMOS SRAM is organized as 128K x 36. The 71V3576 SRAM contains write, data, address and control registers. The burst mode feature offers the highest level of performance to the system designer, as it can provide four cycles of data for a single address presented to the... Read More | |
| Integrated Circuits (ICs) | 47 | 1 | The 71V35761 3.3V CMOS SRAM is organized as 128K x 36. It contains write, data, address and control registers. The burst mode feature offers the highest level of performance to the system designer, as the 71V35761 can provide four cycles of data for a single address presented to the SRAM. | |
| Memory | 29 | 1 | The 71V3577 3.3V CMOS SRAM is organized as 128K x 36 and contains write, data, address, and control registers. The burst mode feature offers the highest level of performance to the system designer, as it can provide four cycles of data for a single address presented to the SRAM. | |
Renesas Electronics Corporation71V3578 | Memory | 6 | 1 | |
| Memory | 8 | 1 | The 71V3579 3.3V CMOS SRAM is organized as 256K x 18 and contains write, data, address, and control registers. The burst mode feature offers the highest level of performance to the system designer, as it can provide four cycles of data for a single address presented to the SRAM. | |
Renesas Electronics Corporation71V416S3.3V 256K x 16 Asynchronous Static RAM Center Pwr & Gnd Pinout | Memory | 46 | 1 | The 71V416 3.3V CMOS SRAM is organized as 256K x 16. All bidirectional inputs and outputs of the 71V416 are LVTTL-compatible and operation is from a single 3.3V supply. Fully static asynchronous circuitry is used, requiring no clocks or refresh for operation. |
Renesas Electronics Corporation71V416Y | Memory | 2 | 8 | |