XIO3130INMH
ObsoleteINTEGRATED PCI EXPRESS® (PCIE) 1:3 4-PORT 4-LANE PACKET SWITCH
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XIO3130INMH
ObsoleteINTEGRATED PCI EXPRESS® (PCIE) 1:3 4-PORT 4-LANE PACKET SWITCH
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Technical Specifications
Parameters and characteristics for this part
| Specification | XIO3130INMH |
|---|---|
| Applications | PCI-to-PCI Bridge |
| Interface | PCI Express |
| Mounting Type | Surface Mount |
| Package / Case | 196-LBGA |
| Supplier Device Package | 196-NFBGA (15x15) |
| Voltage - Supply [Max] | 3.6 V, 1.65 V |
| Voltage - Supply [Min] | 1.35 V, 3 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Texas Instruments | JEDEC TRAY (5+1) | 1 | $ 16.17 | |
| 100 | $ 14.12 | |||
| 250 | $ 10.89 | |||
| 1000 | $ 9.74 | |||
Description
General part information
XIO3130 Series
The Texas Instruments XIO3130 switch is a PCI Express ×1 3-port fanout switch. The XIO3130 provides a single ×1 upstream port supporting full 250-MB/s packet throughput in each direction simultaneously. Three independently configurable ×1 downstream ports are provided that also support full 250-MB/s packet throughput in each direction simultaneously.
A cut-through architecture is implemented to reduce the latency associated with packets moving through the PCI Express fabric. As soon as the address or routing information is decoded within the header of a packet entering an ingress port, the packet is directed to the egress port for forwarding. Packet poisoning using the EDB framing signal is supported in circumstances where packet errors are detected after the transmission of the egress packet begins.
The downstream ports may be configured to support PCI Hot Plug slot implementations. In this scenario, the system designer may decide to use the integrated PCI Hot Plug-compliant controller. This feature is available through the classic PCI configuration space under the PCI Express Capability Structure. When enabled, the downstream ports provide the PCI Hot Plug standard mechanism to apply and remove power to the slot or socket.
Documents
Technical documentation and resources