SNJ54HC195J
Active4-BIT PARALLEL-ACCESS SHIFT REGISTERS
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SNJ54HC195J
Active4-BIT PARALLEL-ACCESS SHIFT REGISTERS
Deep-Dive with AI
Technical Specifications
Parameters and characteristics for this part
| Specification | SNJ54HC195J |
|---|---|
| Function | Universal |
| Logic Type | Shift Register |
| Mounting Type | Through Hole |
| Number of Bits per Element | 4 |
| Number of Elements | 1 |
| Operating Temperature [Max] | 125 °C |
| Operating Temperature [Min] | -55 °C |
| Output Type | Complementary |
| Package / Case | 7.62 mm, 0.3 in |
| Package / Case | 16-CDIP |
| Supplier Device Package | 16-CDIP |
| Voltage - Supply [Max] | 6 V |
| Voltage - Supply [Min] | 2 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Texas Instruments | TUBE | 1 | $ 16.56 | |
| 100 | $ 13.50 | |||
| 250 | $ 10.61 | |||
| 1000 | $ 9.00 | |||
Description
General part information
5962-8682701 Series
These 4-bit registers feature parallel inputs, parallel outputs, J-Kserial inputs, shift/load control input, and a direct overriding clear. The registers have two modes of operation: parallel (broadside) load, and shift (in the direction QAand QD).
Parallel loading is accomplished by applying the 4-bits of data and taking the shift/load control input low. The data is loaded into the associated flip-flop and appears at the outputs after the positive transition of the clock input. During loading, serial data flow is inhibited.
Shifting is accomplished synchronously when the shift/load control input is high. Serial data for this mode is entered at the J-Kinputs. These inputs permit the first stage to perform as a J-K, D, or T type flip-flop as shown in the function table.
Documents
Technical documentation and resources