74ACT11074D
ActiveDUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET
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74ACT11074D
ActiveDUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET
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Technical Specifications
Parameters and characteristics for this part
| Specification | 74ACT11074D |
|---|---|
| Clock Frequency | 125 MHz |
| Current - Output High, Low | 24 mA |
| Current - Quiescent (Iq) | 4 çA |
| Function | Reset, Set(Preset) |
| Input Capacitance | 3.5 pF |
| Max Propagation Delay @ V, Max CL | 8.5 ns |
| Mounting Type | Surface Mount |
| Number of Bits per Element | 1 |
| Number of Elements | 2 |
| Operating Temperature [Max] | 85 °C |
| Operating Temperature [Min] | -40 °C |
| Output Type | Complementary |
| Package / Case | 14-SOIC |
| Package / Case [x] | 0.154 in |
| Package / Case [y] | 3.9 mm |
| Trigger Type | Positive Edge |
| Type | D-Type |
| Voltage - Supply [Max] | 5.5 V |
| Voltage - Supply [Min] | 4.5 V |
74ACT11074 Series
| Part | Type | Max Propagation Delay @ V, Max CL | Input Capacitance | Function | Number of Elements | Mounting Type | Operating Temperature [Max] | Operating Temperature [Min] | Current - Quiescent (Iq) | Trigger Type | Package / Case | Package / Case [y] | Package / Case [x] | Output Type | Number of Bits per Element | Clock Frequency | Current - Output High, Low | Voltage - Supply [Min] | Voltage - Supply [Max] |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Texas Instruments | D-Type | 8.5 ns | 3.5 pF | Reset Set(Preset) | 2 | Through Hole | 85 °C | -40 °C | 4 çA | Positive Edge | 14-DIP | 7.62 mm | 0.3 " | Complementary | 1 | 125 MHz | 24 mA | 4.5 V | 5.5 V |
Texas Instruments | D-Type | 8.5 ns | 3.5 pF | Reset Set(Preset) | 2 | Surface Mount | 85 °C | -40 °C | 4 çA | Positive Edge | 14-SOIC | 3.9 mm | 0.154 in | Complementary | 1 | 125 MHz | 24 mA | 4.5 V | 5.5 V |
Texas Instruments | D-Type | 8.5 ns | 3.5 pF | Reset Set(Preset) | 2 | Through Hole | 85 °C | -40 °C | 4 çA | Positive Edge | 14-DIP | 7.62 mm | 0.3 " | Complementary | 1 | 125 MHz | 24 mA | 4.5 V | 5.5 V |
Texas Instruments | D-Type | 8.5 ns | 3.5 pF | Reset Set(Preset) | 2 | Surface Mount | 85 °C | -40 °C | 4 çA | Positive Edge | 14-SOIC | 3.9 mm | 0.154 in | Complementary | 1 | 125 MHz | 24 mA | 4.5 V | 5.5 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Digikey | Tube | 1 | $ 1.73 | |
| 10 | $ 1.56 | |||
| 50 | $ 1.47 | |||
| 100 | $ 1.25 | |||
| 250 | $ 1.18 | |||
| 500 | $ 1.03 | |||
| Texas Instruments | TUBE | 1 | $ 2.13 | |
| 100 | $ 1.76 | |||
| 250 | $ 1.26 | |||
| 1000 | $ 0.95 | |||
Description
General part information
74ACT11074 Series
This device contains two independent positive-edge-triggered D-type flip-flops. A low level at the preset () or clear () input sets or resets the outputs regardless of the levels of the other inputs. Whenandare inactive (high), data at the data (D) input meeting the setup-time requirements are transferred to the outputs on the low-to-high transition of the clock (CLK) pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of the clock pulse. Following the hold time interval, data at the D input may be changed without affecting the levels at the outputs.
The 74ACT11074 is characterized for operation from -40°C to 85°C.
This device contains two independent positive-edge-triggered D-type flip-flops. A low level at the preset () or clear () input sets or resets the outputs regardless of the levels of the other inputs. Whenandare inactive (high), data at the data (D) input meeting the setup-time requirements are transferred to the outputs on the low-to-high transition of the clock (CLK) pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of the clock pulse. Following the hold time interval, data at the D input may be changed without affecting the levels at the outputs.
Documents
Technical documentation and resources