
71V3559S80PFG8
Obsolete3.3V 256K X 18 ZBT SYNCHRONOUS FLOW-THROUGH SRAM W/3.3V I/O
Deep-Dive with AI
Search across all available documentation for this part.

71V3559S80PFG8
Obsolete3.3V 256K X 18 ZBT SYNCHRONOUS FLOW-THROUGH SRAM W/3.3V I/O
Deep-Dive with AI
Technical Specifications
Parameters and characteristics for this part
| Specification | 71V3559S80PFG8 |
|---|---|
| Access Time | 8 ns |
| Memory Format | SRAM |
| Memory Interface | Parallel |
| Memory Organization | 256K x 18 |
| Memory Size | 4.5 Mbit |
| Memory Type | Volatile |
| Mounting Type | Surface Mount |
| Operating Temperature [Max] | 70 °C |
| Operating Temperature [Min] | 0 °C |
| Package / Case | 100-LQFP |
| Supplier Device Package | 100-TQFP (14x14) |
| Technology | SRAM - Synchronous, SDR (ZBT) |
| Voltage - Supply [Max] | 3.465 V |
| Voltage - Supply [Min] | 3.135 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
Description
General part information
71V3559 Series
The 71V3559 3.3V CMOS Synchronous SRAM is organized as 256K x 18. It is designed to eliminate dead bus cycles when turning the bus around between reads and writes, or writes and reads. Thus it has been given the name ZBTTM, or Zero Bus Turnaround. The 71V3559 contains address, data-in and control signal registers. The outputs are flow-through (no output data register).
Documents
Technical documentation and resources