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71V65603S150PFGI8 - 71V65603 - Block Diagram

71V65603S150PFGI8

Obsolete
Renesas Electronics Corporation

3.3V 256K X 36 ZBT SYNCHRONOUS 3.3V I/O PIPELINED SRAM

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71V65603S150PFGI8 - 71V65603 - Block Diagram

71V65603S150PFGI8

Obsolete
Renesas Electronics Corporation

3.3V 256K X 36 ZBT SYNCHRONOUS 3.3V I/O PIPELINED SRAM

Deep-Dive with AI

DocumentsDatasheet

Technical Specifications

Parameters and characteristics for this part

Specification71V65603S150PFGI8
Access Time3.8 ns
Clock Frequency150 MHz
Memory FormatSRAM
Memory InterfaceParallel
Memory Organization [custom]36
Memory Organization [custom]256 K
Memory Size9 Mbit
Memory TypeVolatile
Mounting TypeSurface Mount
Operating Temperature [Max]85 °C
Operating Temperature [Min]-40 °C
Package / Case100-LQFP
Supplier Device Package100-TQFP (14x14)
TechnologySRAM - Synchronous, SDR (ZBT)
Voltage - Supply [Max]3.465 V
Voltage - Supply [Min]3.135 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

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Description

General part information

71V65603 Series

The 71V65603 3.3V CMOS SRAM, organized as 256K X 36, is designed to eliminate dead bus cycles when turning the bus around between reads and writes or writes and reads. Thus, it has been given the name ZBT™, or Zero Bus Turnaround. The 71V65603 contains data I/O, address, and control signal registers. In the burst mode, it can provide four cycles of data for a single address presented to the SRAM.

Documents

Technical documentation and resources