
74AHC74D,112
ObsoleteFreescale Semiconductor - NXP
IC FF D-TYPE DUAL 1BIT 14SO
Deep-Dive with AI
Search across all available documentation for this part.
DocumentsDatasheet

74AHC74D,112
ObsoleteFreescale Semiconductor - NXP
IC FF D-TYPE DUAL 1BIT 14SO
Deep-Dive with AI
DocumentsDatasheet
Technical Specifications
Parameters and characteristics for this part
| Specification | 74AHC74D,112 |
|---|---|
| Clock Frequency | 115 MHz |
| Current - Output High, Low [custom] | 8 mA |
| Current - Output High, Low [custom] | 8 mA |
| Current - Quiescent (Iq) | 2 µA |
| Function | Reset, Set(Preset) |
| Input Capacitance | 3 pF |
| Max Propagation Delay @ V, Max CL | 9.3 ns |
| Mounting Type | Surface Mount |
| Number of Bits per Element | 1 |
| Number of Elements | 2 |
| Operating Temperature [Max] | 125 °C |
| Operating Temperature [Min] | -40 °C |
| Output Type | Complementary |
| Package / Case | 14-SOIC |
| Package / Case [x] | 0.154 in |
| Package / Case [y] | 3.9 mm |
| Supplier Device Package | 14-SO |
| Trigger Type | Positive Edge |
| Type | D-Type |
| Voltage - Supply [Max] | 5.5 V |
| Voltage - Supply [Min] | 2 V |
74AHC74PW-Q100 Series
Dual D-type flip-flop with set and reset; positive-edge trigger
| Part | Mounting Type | Trigger Type | Input Capacitance | Operating Temperature [Min] | Operating Temperature [Max] | Number of Bits per Element | Clock Frequency | Voltage - Supply [Max] | Voltage - Supply [Min] | Package / Case [x] | Package / Case [y] | Package / Case | Supplier Device Package | Number of Elements | Output Type | Max Propagation Delay @ V, Max CL | Current - Quiescent (Iq) | Function | Type | Current - Output High, Low [custom] | Current - Output High, Low [custom] | Package / Case [custom] | Package / Case [custom] | Grade | Qualification |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Freescale Semiconductor - NXP | Surface Mount | Positive Edge | 3 pF | -40 °C | 125 °C | 1 | 115 MHz | 5.5 V | 2 V | 0.154 in | 3.9 mm | 14-SOIC | 14-SO | 2 | Complementary | 9.3 ns | 2 µA | Reset Set(Preset) | D-Type | 8 mA | 8 mA | ||||
Freescale Semiconductor - NXP | Surface Mount | Positive Edge | 3 pF | -40 °C | 125 °C | 1 | 115 MHz | 5.5 V | 2 V | 14-TSSOP | 14-TSSOP | 2 | Complementary | 9.3 ns | 2 µA | Reset Set(Preset) | D-Type | 8 mA | 8 mA | 0.173 " | 4.4 mm | Automotive | AEC-Q100 | ||
Freescale Semiconductor - NXP | Surface Mount | Positive Edge | 3 pF | -40 °C | 125 °C | 1 | 115 MHz | 5.5 V | 2 V | 0.154 in | 3.9 mm | 14-SOIC | 14-SO | 2 | Complementary | 9.3 ns | 2 µA | Reset Set(Preset) | D-Type | 8 mA | 8 mA | ||||
Freescale Semiconductor - NXP | Surface Mount | Positive Edge | 3 pF | -40 °C | 125 °C | 1 | 115 MHz | 5.5 V | 2 V | 14-TSSOP | 14-TSSOP | 2 | Complementary | 9.3 ns | 2 µA | Reset Set(Preset) | D-Type | 8 mA | 8 mA | 0.173 " | 4.4 mm |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
Description
General part information
74AHC74PW-Q100 Series
The 74AHC74-Q100; 74AHCT74-Q100 is a high-speed Si-gate CMOS device and is pin compatible with Low-Power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard No. 7-A.
Documents
Technical documentation and resources