
SNJ54LVTH574W
Active3.3-V ABT OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS
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SNJ54LVTH574W
Active3.3-V ABT OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS
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Technical Specifications
Parameters and characteristics for this part
| Specification | SNJ54LVTH574W |
|---|---|
| Clock Frequency | 150 MHz |
| Current - Output High, Low [custom] | 24 mA |
| Current - Output High, Low [custom] | 48 mA |
| Current - Quiescent (Iq) | 190 çA |
| Function | Standard |
| Input Capacitance | 3 pF |
| Max Propagation Delay @ V, Max CL | 4.9 ns |
| Mounting Type | Surface Mount |
| Number of Bits per Element | 8 |
| Number of Elements | 1 |
| Operating Temperature [Max] | 125 °C |
| Operating Temperature [Min] | -55 °C |
| Output Type | Tri-State, Non-Inverted |
| Package / Case | 20-CFlatPack |
| Supplier Device Package | 20-CFP |
| Trigger Type | Positive Edge |
| Type | D-Type |
| Voltage - Supply [Max] | 3.6 V |
| Voltage - Supply [Min] | 2.7 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Texas Instruments | TUBE | 1 | $ 49.35 | |
| 100 | $ 43.86 | |||
| 250 | $ 36.06 | |||
| 1000 | $ 32.25 | |||
Description
General part information
5962-9583201 Series
These octal flip-flops are designed specifically for low-voltage (3.3-V) VCCoperation, but with the capability to provide a TTL interface to a 5-V system environment.
The eight flip-flops of the ’LVTH574 devices are edge-triggered D-type flip-flops. On the positive transition of the clock (CLK) input, the Q outputs are set to the logic levels set up at the data (D) inputs.
A buffered output-enable (OE\) input can be used to place the eight outputs in either a normal logic state (high or low logic levels) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without need for interface or pullup components.
Documents
Technical documentation and resources