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UCC21520AQDWQ1 - 16-SOIC

UCC21520AQDWQ1

LTB
Texas Instruments

AUTOMOTIVE 4-A, 6-A, 5.7-KVRMS ISOLATED DUAL-CHANNEL GATE DRIVER WITH DUAL INPUT, DISABLE, DEADTIME

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UCC21520AQDWQ1 - 16-SOIC

UCC21520AQDWQ1

LTB
Texas Instruments

AUTOMOTIVE 4-A, 6-A, 5.7-KVRMS ISOLATED DUAL-CHANNEL GATE DRIVER WITH DUAL INPUT, DISABLE, DEADTIME

Technical Specifications

Parameters and characteristics for this part

SpecificationUCC21520AQDWQ1
Approval AgencyUL, CSA, VDE, CQC
Common Mode Transient Immunity (Min) [Min]100 V/ns
Current - Output High, Low4 A, 6 A
GradeAutomotive
Mounting TypeSurface Mount
Number of Channels [custom]2
Operating Temperature [Max]125 °C
Operating Temperature [Min]-40 °C
Package / Case16-SOIC
Package / Case [x]0.295 in
Package / Case [y]7.5 mm
Propagation Delay tpLH / tpHL (Max) [Max]30 ns
Pulse Width Distortion (Max) [Max]6 ns
QualificationAEC-Q100
Rise / Fall Time (Typ) [custom]7 ns
Rise / Fall Time (Typ) [custom]6 ns
Supplier Device Package16-SOIC
TechnologyCapacitive Coupling
Voltage - Isolation5700 Vrms
Voltage - Output Supply [Max]25 V
Voltage - Output Supply [Min]6.5 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyTube 1$ 6.39
10$ 5.77
40$ 5.50
120$ 4.78
280$ 4.56
520$ 4.16
1000$ 3.62
2520$ 3.49
Texas InstrumentsTUBE 1$ 5.90
100$ 5.17
250$ 3.63
1000$ 2.92

Description

General part information

UCC21520-Q1 Series

The UCC21520 is an isolated dual-channel gate driver with 4A source and 6A sink peak current. It is designed to drive power MOSFETs, IGBTs, and SiC MOSFETs up to 5MHz.

The input side is isolated from the two output drivers by a 5.7kVRMS reinforced isolation barrier, with a minimum of 125V/ns common-mode transient immunity (CMTI). Internal functional isolation between the two secondary-side drivers allows a working voltage of up to 1500VDC.

Every driver can be configured as two low-side drivers, two high-side drivers, or a half-bridge driver with programmable dead time (DT). A disable pin shuts down both outputs simultaneously when it is set high, and allows normal operation when left open or grounded. As a fail-safe measure, primary-side logic failures force both outputs low.