X28HC256WC6721
ObsoleteIC EEPROM 256KBIT PARALLEL
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X28HC256WC6721
ObsoleteIC EEPROM 256KBIT PARALLEL
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Technical Specifications
Parameters and characteristics for this part
| Specification | X28HC256WC6721 |
|---|---|
| Memory Format | EEPROM |
| Memory Interface | Parallel |
| Memory Organization | 32K x 8 |
| Memory Size | 32 KB |
| Memory Type | Non-Volatile |
| Technology | EEPROM |
| Voltage - Supply [Max] | 5.5 V |
| Voltage - Supply [Min] | 4.5 V |
| Write Cycle Time - Word, Page | 5 ms |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
Description
General part information
X28HC256 Series
The X28HC256 is a second generation high performance CMOS 32k x 8 EEPROM. It is fabricated with Intersil’s proprietary, textured poly floating gate technology, providing a highly reliable 5V only nonvolatile memory. The X28HC256 supports a 128-byte page write operation, effectively providing a 24μs/byte write cycle, and enabling the entire memory to be typically rewritten in less than 0. 8s. The X28HC256 also features DATA polling and Toggle bit polling, two methods of providing early end of write detection. The X28HC256 also supports the JEDEC standard software data protection feature for protecting against inadvertent writes during power-up and power-down. Endurance for the X28HC256 is specified as a minimum 100, 000 write cycles per byte and an inherent data retention of 100 years
Documents
Technical documentation and resources