
7285L12PAG8
ObsoleteIC FIFO ASYNC 8KX9X2 56TSSOP
Deep-Dive with AI
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7285L12PAG8
ObsoleteIC FIFO ASYNC 8KX9X2 56TSSOP
Deep-Dive with AI
Technical Specifications
Parameters and characteristics for this part
| Specification | 7285L12PAG8 |
|---|---|
| Access Time | 12 ns |
| Bus Directional | Uni-Directional |
| Current - Supply (Max) [Max] | 150 mA |
| Data Rate | 50 MHz |
| Expansion Type | Width, Depth |
| Function | Asynchronous |
| FWFT Support | False |
| Memory Size | 144 K |
| Mounting Type | Surface Mount |
| Operating Temperature [Max] | 70 °C |
| Operating Temperature [Min] | 0 °C |
| Package / Case | 6.1 mm |
| Package / Case | 0.24 in |
| Package / Case | 56-TFSOP |
| Programmable Flags Support | False |
| Retransmit Capability | True |
| Supplier Device Package | 56-TSSOP |
| Voltage - Supply [Max] | 5.5 V |
| Voltage - Supply [Min] | 4.5 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
Description
General part information
7285 Series
The 7285 is a dual-FIFO memory that loads and empties data on a first-in/first-out basis. It utilizes a 9-bit wide data array to allow for control and parity bits at the user's option. This is useful in data communications applications where a parity bit is needed for transmission/reception error checking. It is designed for those applications requiring asynchronous and simultaneous read/writes in multiprocessing and rate buffer applications.
Documents
Technical documentation and resources