The 5T9070 2.5V single data rate (SDR) clock buffer is a single-ended input to ten single-ended outputs buffer built on advanced metal CMOS technology. The SDR clock buffer fanout from a single input to ten single-ended outputs reduces the loading on the preceding driver and provides an efficient clock distribution network. The 5T9070 has two output banks that can be asynchronously enabled/ disabled. Multiple power and grounds reduce noise.