74AC11074 Series

Dual Positive-Edge-Triggered D-Type Flip-Flops With Clear and Preset

Catalog

Dual Positive-Edge-Triggered D-Type Flip-Flops With Clear and Preset

Part	Voltage - Supply [Max]	Voltage - Supply [Min]	Clock Frequency	Mounting Type	Supplier Device Package	Number of Bits per Element	Current - Quiescent (Iq)	Function	Max Propagation Delay @ V, Max CL	Input Capacitance	Operating Temperature [Max]	Operating Temperature [Min]	Current - Output High, Low	Trigger Type	Package / Case [x]	Package / Case	Package / Case [y]	Number of Elements	Type	Output Type	Package / Case [custom]	Package / Case [custom]
Texas Instruments 74AC11074NSRG4	5.5 V	3 V	150 MHz	Surface Mount	14-SO	1	4 çA	Reset Set(Preset)	7.5 ns	3.5 pF	85 °C	-40 °C	24 mA	Positive Edge	0.209 "	14-SOIC	5.3 mm	2	D-Type	Complementary
Texas Instruments 74AC11074NSRE4	5.5 V	3 V	150 MHz	Surface Mount	14-SO	1	4 çA	Reset Set(Preset)	7.5 ns	3.5 pF	85 °C	-40 °C	24 mA	Positive Edge	0.209 "	14-SOIC	5.3 mm	2	D-Type	Complementary
Texas Instruments 74AC11074PWR	5.5 V	3 V	150 MHz	Surface Mount	14-TSSOP	1	4 çA	Reset Set(Preset)	7.5 ns	3.5 pF	85 °C	-40 °C	24 mA	Positive Edge		14-TSSOP		2	D-Type	Complementary	0.173 "	4.4 mm
Texas Instruments 74AC11074N	5.5 V	3 V	150 MHz	Through Hole		1	4 çA	Reset Set(Preset)	7.5 ns	3.5 pF	85 °C	-40 °C	24 mA	Positive Edge	0.3 "	14-DIP	7.62 mm	2	D-Type	Complementary

Catalog

Dual Positive-Edge-Triggered D-Type Flip-Flops With Clear and Preset

Key Features

• Center-Pin VCCand GND Configurations Minimize High-Speed Switching NoiseEPICTM(Enhanced-Performance Implanted CMOS) 1-m Process500-mA Typical Latch-Up Immunity at 125°CPackage Options Include Plastic Small-Outline (D) and Thin Shrink Small-Outline (PW) Packages, and Standard Plastic 300-mil DIPs (N)EPIC is a trademark of Texas Instruments Incorporated.Center-Pin VCCand GND Configurations Minimize High-Speed Switching NoiseEPICTM(Enhanced-Performance Implanted CMOS) 1-m Process500-mA Typical Latch-Up Immunity at 125°CPackage Options Include Plastic Small-Outline (D) and Thin Shrink Small-Outline (PW) Packages, and Standard Plastic 300-mil DIPs (N)EPIC is a trademark of Texas Instruments Incorporated.

Description

This device contains two independent positive-edge-triggered D-type flip-flops. A low level at the preset () or clear () input sets or resets the outputs regardless of the levels of the other inputs. Whenandare inactive (high), data at the data (D) input that meets the setup-time requirements are transferred to the outputs on the low-to-high transition of the clock (CLK) pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of the clock pulse. Following the hold-time interval, data at the D input may be changed without affecting the levels at the outputs. The 74AC11074 is characterized for operation from -40°C to 85°C. This device contains two independent positive-edge-triggered D-type flip-flops. A low level at the preset () or clear () input sets or resets the outputs regardless of the levels of the other inputs. Whenandare inactive (high), data at the data (D) input that meets the setup-time requirements are transferred to the outputs on the low-to-high transition of the clock (CLK) pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of the clock pulse. Following the hold-time interval, data at the D input may be changed without affecting the levels at the outputs. The 74AC11074 is characterized for operation from -40°C to 85°C.