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SNJ54LVC74AW - 14 CSP

SNJ54LVC74AW

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Texas Instruments

DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET

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SNJ54LVC74AW - 14 CSP

SNJ54LVC74AW

Active
Texas Instruments

DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET

Deep-Dive with AI

Technical Specifications

Parameters and characteristics for this part

SpecificationSNJ54LVC74AW
Clock Frequency100 MHz
Current - Output High, Low24 mA
Current - Quiescent (Iq)10 µA
FunctionReset, Set(Preset)
Input Capacitance5 pF
Max Propagation Delay @ V, Max CL6.4 ns
Mounting TypeSurface Mount
Number of Bits per Element1
Number of Elements2
Operating Temperature [Max]125 °C
Operating Temperature [Min]-55 °C
Output TypeComplementary
Package / Case14-CFlatpack
Trigger TypePositive Edge
TypeD-Type
Voltage - Supply [Max]3.6 V
Voltage - Supply [Min]2 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
Texas InstrumentsTUBE 1$ 32.84
100$ 28.68
250$ 22.12
1000$ 19.78

Description

General part information

5962-9761601 Series

The SNx4LVC74A devices integrate two positive-edge triggered D-type flip-flops in one convenient device.

The SN54LVC74A is designed for 2.7V to 3.6V VCC operation, and the SN74LVC74A is designed for 1.65V to 3.6V VCC operation.

The SNx4LVC74A devices integrate two positive-edge triggered D-type flip-flops in one convenient device.

Documents

Technical documentation and resources

Datasheet

Datasheet

How to Select Little Logic (Rev. A)

Application note

LVC Characterization Information

Application note

Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)

Application note

Semiconductor Packing Material Electrostatic Discharge (ESD) Protection

Application note

STANDARD LINEAR AND LOGIC FOR DVD/VCD PLAYERS

More literature

Logic Guide (Rev. AB)

Selection guide

Selecting the Right Level Translation Solution (Rev. A)

Application note

TI IBIS File Creation, Validation, and Distribution Processes

Application note

Migration From 3.3-V To 2.5-V Power Supplies For Logic Devices

Application note

Texas Instruments Little Logic Application Report

Application note

LVC and LV Low-Voltage CMOS Logic Data Book (Rev. B)

User guide

Implications of Slow or Floating CMOS Inputs (Rev. E)

Application note

Input and Output Characteristics of Digital Integrated Circuits

Application note

Understanding Advanced Bus-Interface Products Design Guide

Application note

Standard Linear & Logic for PCs, Servers & Motherboards

More literature

Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A)

Application note

Low-Voltage Logic (LVC) Designer's Guide

Design guide

16-Bit Widebus Logic Families in 56-Ball, 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B)

Application note

Use of the CMOS Unbuffered Inverter in Oscillator Circuits

Application note

LOGIC Pocket Data Book (Rev. B)

User guide

Power-Up Behavior of Clocked Devices (Rev. B)

Application note

Design Summary for WCSP Little Logic (Rev. B)

Product overview

CMOS Power Consumption and CPD Calculation (Rev. B)

Application note

Signal Switch Data Book (Rev. A)

User guide

SNx4LVC74A Dual Positive-Edge-Triggered D-Type Flip-Flops With Clear and Preset datasheet (Rev. W)

Data sheet

Power-Up 3-State (PU3S) Circuits in TI Standard Logic Devices

Application note

Little Logic Guide 2018 (Rev. G)

Selection guide

Live Insertion

Application note