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RSJ650N10TL - LPTS

RSJ650N10TL

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Rohm Semiconductor

MOSFET N-CH 100V 65A LPTS

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RSJ650N10TL - LPTS

RSJ650N10TL

Active
Rohm Semiconductor

MOSFET N-CH 100V 65A LPTS

Deep-Dive with AI

Technical Specifications

Parameters and characteristics for this part

SpecificationRSJ650N10TL
Current - Continuous Drain (Id) @ 25°C65 A
Drain to Source Voltage (Vdss)100 V
Drive Voltage (Max Rds On, Min Rds On) [Max]4 V
Drive Voltage (Max Rds On, Min Rds On) [Min]10 V
FET TypeN-Channel
Gate Charge (Qg) (Max) @ Vgs260 nC
Input Capacitance (Ciss) (Max) @ Vds10780 pF
Mounting TypeSurface Mount
Operating Temperature150 °C
Package / CaseD2PAK (2 Leads + Tab), TO-263AB, TO-263-3
Power Dissipation (Max) [Max]100 W
Rds On (Max) @ Id, Vgs9.1 mOhm
Supplier Device PackageLPTS
TechnologyMOSFET (Metal Oxide)
Vgs (Max)20 V
Vgs(th) (Max) @ Id [Max]2.5 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyCut Tape (CT) 1$ 6.08
10$ 5.21
100$ 4.34
500$ 3.83
Digi-Reel® 1$ 6.08
10$ 5.21
100$ 4.34
500$ 3.83
Tape & Reel (TR) 1000$ 3.16

Description

General part information

RSJ650N10 Series

MOSFETs are made as ultra-low ON-resistance by the micro-processing technologies suitable for mobile equipment for low current consumption. In wide lineup including compact type, high-power type and complex type to meet in the market.

Documents

Technical documentation and resources

LPTS TL Taping Spec

Datasheet

Datasheet

Datasheet

LPTS Part Marking

Related Document

Transistor, MOSFET Flammability

Related Document

What Is Thermal Design

Thermal Design

Package Dimensions

Package Information

Report of SVHC under REACH Regulation

Environmental Data

About Flammability of Materials

Environmental Data

Measurement Method and Usage of Thermal Resistance RthJC

Thermal Design

About Export Regulations

Export Information

Notes for Temperature Measurement Using Thermocouples

Thermal Design

Moisture Sensitivity Level - Transistors

Package Information

Temperature derating method for Safe Operating Area (SOA)

Schematic Design & Verification

List of Transistor Package Thermal Resistance

Thermal Design

MOSFET Gate Drive Current Setting for Motor Driving

Technical Article

Method for Calculating Junction Temperature from Transient Thermal Resistance Data

Thermal Design

PCB Layout Thermal Design Guide

Thermal Design

Two-Resistor Model for Thermal Simulation

Thermal Design

Inner Structure

Package Information

Types and Features of Transistors

Application Note

How to Create Symbols for PSpice Models

Models

Condition of Soldering / Land Pattern Reference

Package Information

Impedance Characteristics of Bypass Capacitor

Schematic Design & Verification

How to Use LTspice® Models: Tips for Improving Convergence

Schematic Design & Verification

Reliability Test Result

Manufacturing Data

Method for Monitoring Switching Waveform

Schematic Design & Verification

Part Explanation

Application Note

What is a Thermal Model? (Transistor)

Thermal Design

RSJ650N10 Data Sheet

Data Sheet

Taping Information

Package Information

Explanation for Marking

Package Information

Importance of Probe Calibration When Measuring Power: Deskew

Schematic Design & Verification

Overview of ROHM's Simulation Models(for ICs and Discrete Semiconductors)

Technical Article