SNJ54AHC273FK
ActiveOCTAL D-TYPE FLIP-FLOPS WITH CLEAR
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SNJ54AHC273FK
ActiveOCTAL D-TYPE FLIP-FLOPS WITH CLEAR
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Technical Specifications
Parameters and characteristics for this part
| Specification | SNJ54AHC273FK |
|---|---|
| Clock Frequency | 110 MHz |
| Current - Output High, Low [custom] | 8 mA |
| Current - Output High, Low [custom] | 8 mA |
| Current - Quiescent (Iq) | 4 çA |
| Input Capacitance | 2.5 pF |
| Max Propagation Delay @ V, Max CL | 11 ns |
| Mounting Type | Surface Mount |
| Number of Bits per Element | 8 |
| Number of Elements | 1 |
| Operating Temperature [Max] | 125 °C |
| Operating Temperature [Min] | -55 °C |
| Output Type | Non-Inverted |
| Package / Case | 20-CLCC |
| Supplier Device Package | 20-LCCC (8.89x8.89) |
| Trigger Type | Positive Edge |
| Type | D-Type |
| Voltage - Supply [Max] | 5.5 V |
| Voltage - Supply [Min] | 2 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Texas Instruments | TUBE | 1 | $ 29.65 | |
| 100 | $ 25.90 | |||
| 250 | $ 19.97 | |||
| 1000 | $ 17.86 | |||
Description
General part information
5962-9853001 Series
These devices are positive-edge-triggered D-type flip-flops with a direct clear ( CLR) input.
Information at the data (D) inputs meeting the setup time requirements is transferred to the Q outputs on the positive-going edge of the clock (CLK) pulse. Clock triggering occurs at a particular voltage level and is not directly related to the transition time of the positive-going pulse. When CLK is at either the high or low level, the D input has no effect at the output.
These devices are positive-edge-triggered D-type flip-flops with a direct clear ( CLR) input.
Documents
Technical documentation and resources