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LTC4315IDE#PBF - Analog Devices-LT3500EDD#PBF DC to DC Converter and Switching Regulator Chip Conv DC-DC 3V to 36V Synchronous Step Down Dual-Out 0.8V 2A 12-Pin DFN EP Tube

LTC4315IDE#PBF

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Analog Devices

I2C LOGIC BUFFER 3.3V/5V 12-PIN DFN EP TUBE

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LTC4315IDE#PBF - Analog Devices-LT3500EDD#PBF DC to DC Converter and Switching Regulator Chip Conv DC-DC 3V to 36V Synchronous Step Down Dual-Out 0.8V 2A 12-Pin DFN EP Tube

LTC4315IDE#PBF

Active
Analog Devices

I2C LOGIC BUFFER 3.3V/5V 12-PIN DFN EP TUBE

Deep-Dive with AI

Technical Specifications

Parameters and characteristics for this part

SpecificationLTC4315IDE#PBF
ApplicationsI2C - Hotswap
Data Rate (Max)400 kHz
Input2-Wire Bus
Mounting TypeSurface Mount
Number of Channels1
Operating Temperature [Max]85 °C
Operating Temperature [Min]-40 °C
Output2-Wire Bus
Package / Case12-WFDFN Exposed Pad
Supplier Device Package12-DFN (4x3)
TypeBuffer, Accelerator
Voltage - Supply [Max]5.5 V
Voltage - Supply [Min]2.9 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyTube 1$ 10.04
10$ 6.98
25$ 6.19
100$ 5.31
250$ 4.88
500$ 4.62
1000$ 4.40

Description

General part information

LTC4315 Series

The LTC4315 is a hot-swappable 2-wire bus buffer that provides bidirectional buffering, while maintaining a low offset voltage and high noise margin up to 0.3 • VCC. The high noise margin allows the LTC4315 to be interoperable with devices that drive a high VOL(>0.4V) and allows multiple LTC4315s to be cascaded. The LTC4315 supports level translation between 1.5V, 1.8V, 2.5V, 3.3V and 5V busses.During insertion, the SDA and SCL lines are precharged to 1V to minimize bus disturbances. Connection is established between the input and output after ENABLE is asserted high and a stop bit or bus idle condition has been detected on the SDA and SCL pins.If both data and clock are not simultaneously high at least once in 45ms and DISCEN is high, aFAULTsignal is generated indicating a stuck bus low condition and the input is disconnected from the output. Up to 16 clock pulses are subsequently generated to free the stuck bus. A three stateACCpin enables input and output side rise time accelerators of various strengths.ApplicationsCapacitance Buffers/Bus ExtenderLive Board InsertionTelecommunications Systems Including ATCALevel TranslationPMBusServers

Documents

Technical documentation and resources