Zenode.ai Logo
Beta
K
2059GI-02LFT - 2059-02 - Block Diagram

2059GI-02LFT

Obsolete
Renesas Electronics Corporation

CLOCK MULTIPLIER AND JITTER ATTENUATOR

Deep-Dive with AI

Search across all available documentation for this part.

2059GI-02LFT - 2059-02 - Block Diagram

2059GI-02LFT

Obsolete
Renesas Electronics Corporation

CLOCK MULTIPLIER AND JITTER ATTENUATOR

Deep-Dive with AI

Technical Specifications

Parameters and characteristics for this part

Specification2059GI-02LFT
Differential - Input:OutputFalse
Frequency - Max [Max]27 MHz
InputCrystal, Clock
Mounting TypeSurface Mount
Number of Circuits1
Operating Temperature [Max]85 °C
Operating Temperature [Min]-40 °C
OutputCMOS
Package / Case16-TSSOP
Package / Case [x]0.173 in
Package / Case [y]4.4 mm
PLLTrue
Ratio - Input:Output2:1
Supplier Device Package16-TSSOP
TypeJitter Attenuator, Multiplexer
Voltage - Supply [Max]3.45 V
Voltage - Supply [Min]3.15 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$

Description

General part information

2059-02 Series

The 2059-02 is a VCXO (Voltage Controlled Crystal Oscillator) based clock multiplier and jitter attenuator designed for system clock distribution applications. This monolithic IC, combined with an external inexpensive quartz crystal, can be used to replace a more costly hybrid VCXO retiming module. A dual input mux is also provided. By controlling the VCXO frequency within a phase-locked loop (PLL), the output clock is phase and frequency locked to the input clock. Through selection of external loop filter components, the PLL loop bandwidth and damping factor can be tailored to meet system clock requirements. A loop bandwidth down to the Hz range is possible.

Documents

Technical documentation and resources