72V3631L15PF

Obsolete

Renesas Electronics Corporation

IC FIFO SYNC 512X36 10NS 120QFP

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72V3631L15PF

Obsolete

Renesas Electronics Corporation

IC FIFO SYNC 512X36 10NS 120QFP

Deep-Dive with AI

DocumentsDatasheet

Specifications Pricing Series Description Documents

Technical Specifications

Parameters and characteristics for this part

Specification	72V3631L15PF

Access Time	10 ns
Bus Directional	Bi-Directional
Current - Supply (Max) [Max]	400 µA
Data Rate	66.7 MHz
Expansion Type	Width, Depth
Function	Synchronous
FWFT Support	True
Memory Size	18 K
Mounting Type	Surface Mount
Operating Temperature [Max]	70 °C
Operating Temperature [Min]	0 °C
Package / Case	120-LQFP
Programmable Flags Support	True
Retransmit Capability	True
Supplier Device Package	120-TQFP (14x14)
Voltage - Supply [Max]	3.6 V
Voltage - Supply [Min]	3 V

72V3631 Series

512 x 36 SyncFIFO, 3.3V

Part	Current - Supply (Max) [Max]	Package / Case	Memory Size	Bus Directional	Function	Supplier Device Package [x]	Supplier Device Package [y]	Supplier Device Package	Access Time	Data Rate	Operating Temperature [Max]	Expansion Type	Mounting Type	Voltage - Supply [Min]	Voltage - Supply [Max]
Renesas Electronics Corporation 72V3631L15PQF	400 µA	132-BQFP Bumpered	18 K	Bi-Directional	Synchronous	24.13	24.13	132-PQFP	10 ns	66.7 MHz	70 °C	Depth Width	Surface Mount	3 V	3.6 V
Renesas Electronics Corporation 72V3631L15PFG8	400 µA	120-LQFP	18 K	Bi-Directional	Synchronous			120-TQFP (14x14)	10 ns	66.7 MHz	70 °C	Depth Width	Surface Mount	3 V	3.6 V
Renesas Electronics Corporation 72V3631L15PF	400 µA	120-LQFP	18 K	Bi-Directional	Synchronous			120-TQFP (14x14)	10 ns	66.7 MHz	70 °C	Depth Width	Surface Mount	3 V	3.6 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

Distributor	Package	Quantity	$

Description

General part information

72V3631 Series

The 72V3631is a 512 x 36 Sync FIFO memory that is a 3.3V version of the 723631. It supports clock frequencies up to 67 MHz and has read access times as fast as 10ns. The FIFO memory has retransmit capability, which allows previously read data to be accessed again. The FIFO operates in First Word Fall Through mode. Communication between each port may take place with two 36-bit mailbox registers. The enables for each port are arranged to provide a simple interface between microprocessors and/or buses with synchronous control.

Documents

Technical documentation and resources