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2SA2018TL - Product schematic image

2SA2018TL

Active
Rohm Semiconductor

SMALL SIGNAL BIPOLAR TRANSISTOR, 0.5A I(C), 12V V(BR)CEO, 1-ELEMENT, PNP, SILICON, ROHS COMPLIANT, EMT3, SC-75A, 3 PIN

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2SA2018TL - Product schematic image

2SA2018TL

Active
Rohm Semiconductor

SMALL SIGNAL BIPOLAR TRANSISTOR, 0.5A I(C), 12V V(BR)CEO, 1-ELEMENT, PNP, SILICON, ROHS COMPLIANT, EMT3, SC-75A, 3 PIN

Technical Specifications

Parameters and characteristics for this part

Specification2SA2018TL
Current - Collector (Ic) (Max) [Max]500 mA
Current - Collector Cutoff (Max) [Max]100 nA
DC Current Gain (hFE) (Min) @ Ic, Vce [Min]270
Mounting TypeSurface Mount
Operating Temperature150 °C
Package / CaseSC-75, SOT-416
Power - Max [Max]150 mW
Supplier Device PackageEMT3
Transistor TypePNP
Vce Saturation (Max) @ Ib, Ic250 mV
Voltage - Collector Emitter Breakdown (Max) [Max]12 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyCut Tape (CT) 1$ 0.56
10$ 0.35
100$ 0.22
500$ 0.17
1000$ 0.15
Digi-Reel® 1$ 0.56
10$ 0.35
100$ 0.22
500$ 0.17
1000$ 0.15
Tape & Reel (TR) 3000$ 0.08
6000$ 0.08

Description

General part information

2SA2018E3HZG Series

Various products are available in lineup developed focusing on energy-saving and high reliability as main concepts, covering from ultra-compact packages to power-packages to meet the needs in market.

Documents

Technical documentation and resources

Types and Features of Transistors

Application Note

What Is Thermal Design

Thermal Design

Part Explanation

Application Note

Overview of ROHM's Simulation Models(for ICs and Discrete Semiconductors)

Technical Article

About Export Regulations

Export Information

About Flammability of Materials

Environmental Data

Two-Resistor Model for Thermal Simulation

Thermal Design

Taping Information

Package Information

Reliability Test Result

Manufacturing Data

List of Transistor Package Thermal Resistance

Thermal Design

Importance of Probe Calibration When Measuring Power: Deskew

Schematic Design & Verification

What is a Thermal Model? (Transistor)

Thermal Design

Moisture Sensitivity Level - Transistors

Package Information

Condition of Soldering / Land Pattern Reference

Package Information

Inner Structure

Package Information

Package Dimensions

Package Information

Impedance Characteristics of Bypass Capacitor

Schematic Design & Verification

Explanation for Marking

Package Information

ESD Data

Characteristics Data

Notes for Temperature Measurement Using Thermocouples

Thermal Design

PCB Layout Thermal Design Guide

Thermal Design

How to Use LTspice® Models: Tips for Improving Convergence

Schematic Design & Verification

Method for Monitoring Switching Waveform

Schematic Design & Verification

Temperature derating method for Safe Operating Area (SOA)

Schematic Design & Verification

Method for Calculating Junction Temperature from Transient Thermal Resistance Data

Thermal Design

How to Create Symbols for PSpice Models

Models

Measurement Method and Usage of Thermal Resistance RthJC

Thermal Design

Transistor, MOSFET Flammability

Related Document

EMT3 Part Marking

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Datasheet

EMT3 Inner Structure

Related Document