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UCD7231RTJT - -pin () package image

UCD7231RTJT

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Texas Instruments

DIGITAL CONTROL COMPATIBLE SYNCHRONOUS BUCK GATE DRIVER WITH CURRENT SENSE AND FAULT PROTECTION

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UCD7231RTJT - -pin () package image

UCD7231RTJT

Active
Texas Instruments

DIGITAL CONTROL COMPATIBLE SYNCHRONOUS BUCK GATE DRIVER WITH CURRENT SENSE AND FAULT PROTECTION

Technical Specifications

Parameters and characteristics for this part

SpecificationUCD7231RTJT
Clock SyncFalse
Frequency - Switching [Max]2 MHz
FunctionStep-Down
Mounting TypeSurface Mount
Number of Outputs1
Operating Temperature [Max]125 ¯C
Operating Temperature [Min]-40 °C
Output ConfigurationPositive
Output Phases1
Output TypeTransistor Driver
Package / Case20-WFQFN Exposed Pad
Supplier Device Package20-QFN (4x4)
Synchronous RectifierTrue
TopologyBuck
Voltage - Supply (Vcc/Vdd) [Max]15 V
Voltage - Supply (Vcc/Vdd) [Min]4.7 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyCut Tape (CT) 1$ 2.12
10$ 1.91
25$ 1.80
100$ 1.53
Digi-Reel® 1$ 2.12
10$ 1.91
25$ 1.80
100$ 1.53
Tape & Reel (TR) 250$ 1.01
500$ 0.89
Texas InstrumentsSMALL T&R 1$ 1.60
100$ 1.32
250$ 0.95
1000$ 0.71

Description

General part information

UCD7231 Series

The UCD7231 high current driver is specifically designed for digitally-controlled, point-of-load, synchronous buck switching power supplies. Two driver circuits provide high charge and discharge current for the high-side NMOS switch and the low-side NMOS synchronous rectifier in a synchronous buck circuit. The MOSFET gates are driven to +6 V by an internally regulated VGGsupply. The internal VGGregulator can be disabled to permit the user to supply their own gate drive voltage. This flexibility allows a wide power conversion input voltage range of 2.2 to 15 V. Internal under voltage lockout (UVLO) logic insures VGGis good before allowing chip operation.

A drive logic block allows operation in one of two modes selected by the SRE Mode pin. In Synchronous Mode, the logic block uses the PWM signal to control both the high-side and low-side gate drive signals. Dead time is automatically adjusted to prevent cross conduction. The Synchronous Rectifier Enable (SRE) pin controls whether or not the low-side FET is turned on when the PWM signal is low. In Independent Mode, the PWM and SRE pins control the high-side and low-side gates directly. No anti-cross-conduction logic is used in this mode.

On-board comparators monitor the voltage across the high side switch and the voltage across an external current sense element to safeguard the power stage from sudden high current loads. Blanking delay is set for the high side comparator by a single resistor in order to avoid false reports coincident with switching edge noise. In the event of a high-side fault or an over-current fault, the high-side FET turned off and the Fault Flag (FLT) is asserted to alert the digital controller. The fault thresholds are independently set by the HS Sense and ILIM pins.