Zenode.ai Logo
Beta
K
74AVCH1T45DW-7 - Package Image for SOT363

74AVCH1T45DW-7

Active
Diodes Inc

TRANSCEIVER, TRANSLATING, 1 INPUT, 2.8 NS, 1.2 V TO 3.6 V, 6 PINS, SOT-363

Deep-Dive with AI

Search across all available documentation for this part.

74AVCH1T45DW-7 - Package Image for SOT363

74AVCH1T45DW-7

Active
Diodes Inc

TRANSCEIVER, TRANSLATING, 1 INPUT, 2.8 NS, 1.2 V TO 3.6 V, 6 PINS, SOT-363

Deep-Dive with AI

Technical Specifications

Parameters and characteristics for this part

Specification74AVCH1T45DW-7
Channel TypeBidirectional
Channels per Circuit1
Mounting TypeSurface Mount
Number of Circuits1
Operating Temperature [Max]85 °C
Operating Temperature [Min]-40 °C
Output TypeTri-State, Non-Inverted
Package / Case6-TSSOP, SC-88, SOT-363
Supplier Device PackageSOT-363
Translator TypeVoltage Level
Voltage - VCCA [Max]3.6 V
Voltage - VCCA [Min]1.2 V
Voltage - VCCB [Max]3.6 V
Voltage - VCCB [Min]1.2 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyCut Tape (CT) 1$ 0.37
10$ 0.30
25$ 0.28
100$ 0.21
250$ 0.19
500$ 0.15
1000$ 0.12
Digi-Reel® 1$ 0.37
10$ 0.30
25$ 0.28
100$ 0.21
250$ 0.19
500$ 0.15
1000$ 0.12
Tape & Reel (TR) 3000$ 0.11
6000$ 0.10
15000$ 0.09
30000$ 0.09
75000$ 0.08
NewarkEach (Supplied on Cut Tape) 1$ 0.61
10$ 0.33
25$ 0.29
50$ 0.25
100$ 0.21
250$ 0.20
500$ 0.20
1000$ 0.19

Description

General part information

74AVCH1T45 Series

The 74AVCH1T45 is a single bit, dual supply transceiver with 3-state outputs suitable for transmitting a single logic bit across different voltage domains. The 74AVCH1T45 is a variant of the 74AVC1T45 that includes a bus hold feature at each input. The A input/output pin is designed to track VCCA while the B input/output tracks VCCB. This arrangement allows for universal low-voltage translation between any voltages from 1.2V to 3.6V. The Direction pin (DIR) controls the direction of the transceiver and in a logic voltage related to VCCA. When a high logic level is applied to DIR the A pin becomes an input and the B pin becomes the output. Conversely the roles of A and B are reversed when DIR is asserted low.