74LVC1G32FZ4-7
ActiveOR GATE, LVC/LCX/Z SERIES, 1-FUNC, 2-INPUT, CMOS, PDSO6, 1.40 X 1 MM, ROHS COMPLIANT, DFN-6
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74LVC1G32FZ4-7
ActiveOR GATE, LVC/LCX/Z SERIES, 1-FUNC, 2-INPUT, CMOS, PDSO6, 1.40 X 1 MM, ROHS COMPLIANT, DFN-6
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Technical Specifications
Parameters and characteristics for this part
| Specification | 74LVC1G32FZ4-7 |
|---|---|
| Current - Output High, Low [x] | 32 mA |
| Current - Output High, Low [y] | 32 mA |
| Current - Quiescent (Max) [Max] | 200 µA |
| Input Logic Level - High [Max] | 2 V |
| Input Logic Level - High [Min] | 1.7 V |
| Input Logic Level - Low [Max] | 0.8 V |
| Input Logic Level - Low [Min] | 0.7 V |
| Logic Type | OR Gate |
| Max Propagation Delay @ V, Max CL | 5.5 ns |
| Mounting Type | Surface Mount |
| Number of Circuits | 1 |
| Number of Inputs | 2 |
| Operating Temperature [Max] | 125 °C |
| Operating Temperature [Min] | -40 °C |
| Package / Case | 6-XFDFN |
| Supplier Device Package | X2-DFN1410-6 |
| Voltage - Supply [Max] | 5.5 V |
| Voltage - Supply [Min] | 1.65 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Digikey | Cut Tape (CT) | 1 | $ 0.43 | |
| 10 | $ 0.32 | |||
| 25 | $ 0.29 | |||
| 100 | $ 0.20 | |||
| 250 | $ 0.17 | |||
| 500 | $ 0.14 | |||
| 1000 | $ 0.11 | |||
| 2500 | $ 0.10 | |||
| Digi-Reel® | 1 | $ 0.43 | ||
| 10 | $ 0.32 | |||
| 25 | $ 0.29 | |||
| 100 | $ 0.20 | |||
| 250 | $ 0.17 | |||
| 500 | $ 0.14 | |||
| 1000 | $ 0.11 | |||
| 2500 | $ 0.10 | |||
| Tape & Reel (TR) | 5000 | $ 0.09 | ||
| 10000 | $ 0.08 | |||
| 25000 | $ 0.08 | |||
| 50000 | $ 0.07 | |||
| 125000 | $ 0.07 | |||
Description
General part information
74LVC1G32 Series
The 74LVC1G32 is a single 2-input positive OR gate with a standard totem pole output. The device is designed for operation with a power supply range of 1.65V to 5.5V. The inputs are tolerant to 5.5V allowing this device to be used in a mixed voltage environment. The device is fully specified for partial power down applications using IOFF. The IOFFcircuitry disables the output preventing damaging current backflow when the device is powered down.
Documents
Technical documentation and resources