
7132LA35PDG
Obsolete4.5V~5.5V 16KBIT PDIP-48 SRAM ROHS
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7132LA35PDG
Obsolete4.5V~5.5V 16KBIT PDIP-48 SRAM ROHS
Deep-Dive with AI
Technical Specifications
Parameters and characteristics for this part
| Specification | 7132LA35PDG |
|---|---|
| Access Time | 35 ns |
| Memory Format | SRAM |
| Memory Interface | Parallel |
| Memory Organization | 2K x 8 |
| Memory Size | 16 Kbit |
| Memory Type | Volatile |
| Mounting Type | Through Hole |
| Operating Temperature [Max] | 70 °C |
| Operating Temperature [Min] | 0 °C |
| Package / Case | 15.24 mm, 0.6 in |
| Package / Case | 48-DIP |
| Supplier Device Package | 48-PDIP |
| Technology | SRAM - Dual Port, Asynchronous |
| Voltage - Supply [Max] | 5.5 V |
| Voltage - Supply [Min] | 4.5 V |
| Write Cycle Time - Word, Page | 35 ns |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| LCSC | Piece | 1 | $ 18.98 | |
| 200 | $ 7.35 | |||
| 500 | $ 7.09 | |||
| 1000 | $ 6.96 | |||
Description
General part information
7132SA Series
The 7132 is a high-speed 2K x 8 Dual-Port Static RAM designed to be used as a stand-alone 8-bit Dual-Port RAM or as a "MASTER" Dual-Port RAM together with the 7142 "SLAVE" Dual-Port in 16-bit-or-more word width systems which would result in full-speed, error free operation without the need for additional discrete logic. An automatic power down feature, controlled by CE, permits the on chip circuitry of each port to enter a very low standby power mode. Military grade product in compliance with MIL-PRF-38535 QML is available.
Documents
Technical documentation and resources