
672M-02ILFT
ObsoleteQUADRACLOCK QUADRATURE DELAY BUFFER
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672M-02ILFT
ObsoleteQUADRACLOCK QUADRATURE DELAY BUFFER
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Technical Specifications
Parameters and characteristics for this part
| Specification | 672M-02ILFT |
|---|---|
| Differential - Input:Output | False |
| Frequency - Max [Max] | 135 MHz |
| Input | Clock |
| Mounting Type | Surface Mount |
| Number of Circuits | 1 |
| Operating Temperature [Max] | 85 °C |
| Operating Temperature [Min] | -40 °C |
| Output | CMOS |
| Package / Case | 16-SOIC |
| Package / Case [x] | 0.154 in |
| Package / Case [y] | 3.9 mm |
| PLL | True |
| Ratio - Input:Output | 1:4 |
| Supplier Device Package | 16-SOIC |
| Type | Zero Delay Buffer, Fanout Buffer (Distribution) |
| Voltage - Supply [Max] | 5.5 V |
| Voltage - Supply [Min] | 3.13 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
Description
General part information
672-02 Series
The 672-01/02 are zero delay buffers that generate four output clocks whose phases are spaced at 90° intervals. Based on IDT's proprietary low jitter Phase-Locked Loop (PLL) techniques, each device provides five low-skew outputs, with clock rates up to 84 MHz for the 672-01 and up to 135 MHz for the 672-02. By providing outputs delayed one quarter clock cycle, the device is useful for systems requiring early or late clocks. The 672-01/02 include multiplier selections of x0.5, x1, x2, x3, x4, x5, or x6. They also offer a mode to power-down all internal circuitry and tri-state the outputs. In normal operation, output clock FBCLK is tied to the FBIN pin. IDT manufactures the largest variety of clock generators and buffers, and is the largest clock supplier in the world.
Documents
Technical documentation and resources