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UC2825ANG4 - 16-DIP SOT38-1

UC2825ANG4

Unknown
Texas Instruments

IC REG CTRLR MULT TOPOLOGY 16DIP

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UC2825ANG4 - 16-DIP SOT38-1

UC2825ANG4

Unknown
Texas Instruments

IC REG CTRLR MULT TOPOLOGY 16DIP

Deep-Dive with AI

DocumentsDatasheet

Technical Specifications

Parameters and characteristics for this part

SpecificationUC2825ANG4
Clock SyncFalse
Control FeaturesFrequency Control, Soft Start, Current Limit, Ramp
Duty Cycle (Max) [Max]50 %
Frequency - Switching [Max]1 MHz
Frequency - Switching [Min]400 kHz
FunctionStep-Up, Step-Up/Step-Down
Mounting TypeThrough Hole
Number of Outputs2
Operating Temperature [Max]85 °C
Operating Temperature [Min]-40 °C
Output ConfigurationPositive
Output Phases1
Output TypeTransistor Driver
Package / Case0.3 in
Package / Case16-DIP
Package / Case7.62 mm
Supplier Device Package16-PDIP
Synchronous RectifierFalse
TopologyForward Converter, Full-Bridge, Flyback, Half-Bridge, Boost, Push-Pull
Voltage - Supply (Vcc/Vdd) [Max]22 V
Voltage - Supply (Vcc/Vdd) [Min]8.4 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyTube 75$ 7.61

Description

General part information

UC2825A-EP Series

The UC2825A-EP pulse width modulation (PWM) controller is an improved version of the standard UC2825. Performance enhancements have been made to several of the circuit blocks. Error amplifier gain bandwidth product is 12 MHz, while input offset voltage is 2 mV. Current-limit threshold is specified to a tolerance of 5%. Oscillator discharge current is specified at 10 mA for accurate dead-time control. Frequency accuracy is improved to 6%. Startup supply current, typically 100 µA, is ideal for off-line applications. The output drivers are redesigned to actively sink current during undervoltage lockout (UVLO) at no expense to the startup current specification. In addition, each output is capable of 2-A peak currents during transitions.

Functional improvements also have been implemented in this family. The UC2825A-EP shutdown comparator is now a high-speed overcurrent comparator with a threshold of 1.2 V. The overcurrent comparator sets a latch that ensures full discharge of the soft-start capacitor before allowing a restart. While the fault latch is set, the outputs are in the low state. In the event of continuous faults, the soft-start capacitor is fully charged before discharge to ensure that the fault frequency does not exceed the designed soft-start period. The UC2825 CLOCK pin is CLK/LEB in the UC2825A-EP. This pin combines the functions of clock output and leading-edge blanking adjustment and has been buffered for easier interfacing.

The UC2825A-EP has dual alternating outputs and the same pin configuration as UC2825. UVLO thresholds are identical to the original UC2825.

Documents

Technical documentation and resources