72T18105L6-7BB

Obsolete

Renesas Electronics Corporation

128K X 18 / 256K X 9 TERASYNC FIFO, 2.5V

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DocumentsDatasheet 72T1845-72T18125 Datasheet

72T18105L6-7BB

Obsolete

Renesas Electronics Corporation

128K X 18 / 256K X 9 TERASYNC FIFO, 2.5V

Deep-Dive with AI

DocumentsDatasheet 72T1845-72T18125 Datasheet

Specifications Pricing Series Description Documents

Technical Specifications

Parameters and characteristics for this part

Specification	72T18105L6-7BB

Access Time	3.8 ns, 12 ns
Bus Directional	Uni-Directional
Current - Supply (Max) [Max]	70 mA
Data Rate	150 MHz, 66 MHz
Expansion Type	Width, Depth
Function	Synchronous, Asynchronous
FWFT Support	True
Memory Size	2.25 M
Mounting Type	Surface Mount
Operating Temperature [Max]	70 °C
Operating Temperature [Min]	0 °C
Package / Case	240-BGA
Programmable Flags Support	True
Retransmit Capability	True
Supplier Device Package	240-PBGA (19x19)
Voltage - Supply [Max]	2.625 V
Voltage - Supply [Min]	2.375 V

72T18105 Series

128K x 18 / 256K x 9 TeraSync FIFO, 2.5V

Part	Programmable Flags Support	Supplier Device Package	FWFT Support	Package / Case	Memory Size	Data Rate	Expansion Type	Current - Supply (Max) [Max]	Voltage - Supply [Min]	Voltage - Supply [Max]	Bus Directional	Retransmit Capability	Function	Operating Temperature [Max]	Operating Temperature [Min]	Mounting Type	Access Time
Renesas Electronics Corporation 72T18105L6-7BB		240-PBGA (19x19)		240-BGA	2.25 M	66 MHz 150 MHz	Depth Width	70 mA	2.375 V	2.625 V	Uni-Directional		Asynchronous Synchronous	70 °C	0 °C	Surface Mount	3.8 ns 12 ns
Renesas Electronics Corporation 72T18105L4-4BB		240-PBGA (19x19)		240-BGA	2.25 M	100 MHz 225 MHz	Depth Width	70 mA	2.375 V	2.625 V	Uni-Directional		Asynchronous Synchronous	70 °C	0 °C	Surface Mount	3.4 ns 8 ns

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

Distributor	Package	Quantity	$

Description

General part information

72T18105 Series

The 72T18105 is a 128K x 18 / 256K x 9 TeraSync 2.5V FIFO memory with clocked read and write controls and a flexible Bus-Matching x18/x9 data flow. Bus-Matching TeraSync FIFOs are particularly appropriate for network, video, telecommunications, data communications and other applications that need to buffer large amounts of data and match busses of unequal sizes. There are two possible timing modes of operation with these devices: IDT Standard mode and First Word Fall Through mode.