
LTC6954IUFF-3#TRPBF
LTBLOW PHASE NOISE, TRIPLE OUTPUT CLOCK DISTRIBUTION DIVIDER/DRIVER
Deep-Dive with AI
Search across all available documentation for this part.

LTC6954IUFF-3#TRPBF
LTBLOW PHASE NOISE, TRIPLE OUTPUT CLOCK DISTRIBUTION DIVIDER/DRIVER
Deep-Dive with AI
Technical Specifications
Parameters and characteristics for this part
| Specification | LTC6954IUFF-3#TRPBF |
|---|---|
| Differential - Input:Output [custom] | True |
| Differential - Input:Output [custom] | True |
| Frequency - Max [Max] | 1.4 GHz |
| Input | LVDS, LVCMOS, LVPECL |
| Mounting Type | Surface Mount |
| Number of Circuits | 1 |
| Operating Temperature [Max] | 105 ░C |
| Operating Temperature [Min] | -40 °C |
| Output | LVDS, LVPECL, LVCMOS |
| Package / Case | 36-WFQFN Exposed Pad |
| Ratio - Input:Output [custom] | 1:3 |
| Supplier Device Package | 36-QFN (4x7) |
| Type | Divider, Fanout Buffer (Distribution) |
| Voltage - Supply [Max] | 3.45 V |
| Voltage - Supply [Min] | 3.15 V |
LTC6954 Series
| Part | Mounting Type | Operating Temperature [Min] | Operating Temperature [Max] | Number of Circuits | Voltage - Supply [Max] | Voltage - Supply [Min] | Supplier Device Package | Frequency - Max [Max] | Input | Differential - Input:Output [custom] | Differential - Input:Output [custom] | Type | Output | Ratio - Input:Output [custom] | Package / Case |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Analog Devices | Surface Mount | -40 °C | 105 ░C | 1 | 3.45 V | 3.15 V | 36-QFN (4x7) | 1.4 GHz | LVCMOS LVDS LVPECL | Divider Fanout Buffer (Distribution) | LVCMOS LVDS LVPECL | 1:3 | 36-WFQFN Exposed Pad | ||
Analog Devices | Surface Mount | -40 °C | 105 ░C | 1 | 3.45 V | 3.15 V | 36-QFN (4x7) | 1.4 GHz | LVCMOS LVDS LVPECL | Divider Fanout Buffer (Distribution) | LVCMOS LVDS LVPECL | 1:3 | 36-WFQFN Exposed Pad | ||
Analog Devices | Surface Mount | -40 °C | 105 ░C | 1 | 3.45 V | 3.15 V | 36-QFN (4x7) | 1.4 GHz | LVCMOS LVDS LVPECL | Divider Fanout Buffer (Distribution) | LVCMOS LVDS LVPECL | 1:3 | 36-WFQFN Exposed Pad | ||
Analog Devices | Surface Mount | -40 °C | 105 ░C | 1 | 3.45 V | 3.15 V | 36-QFN (4x7) | 1.8 GHz | LVCMOS LVDS LVPECL | Divider Fanout Buffer (Distribution) | LVPECL | 1:3 | 36-WFQFN Exposed Pad | ||
Analog Devices | Surface Mount | -40 °C | 105 ░C | 1 | 3.45 V | 3.15 V | 36-QFN (4x7) | 1.4 GHz | LVCMOS LVDS LVPECL | Divider Fanout Buffer (Distribution) | LVCMOS LVDS LVPECL | 1:3 | 36-WFQFN Exposed Pad | ||
Analog Devices | Surface Mount | -40 °C | 105 ░C | 1 | 3.45 V | 3.15 V | 36-QFN (4x7) | 1.4 GHz | LVCMOS LVDS LVPECL | Divider Fanout Buffer (Distribution) | LVCMOS LVDS LVPECL | 1:3 | 36-WFQFN Exposed Pad |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Digikey | Tape & Reel (TR) | 2500 | $ 11.63 | |
Description
General part information
LTC6954 Series
The LTC6954 is a family of very low phase noise clock distribution parts. Each part has three outputs and each output has an individually programmable frequency divider and delay. There are four members of the family, differing in their output logic signal type:LTC6954-1: Three LVPECL outputsLTC6954-2: Two LVPECL and one LVDS/CMOS outputsLTC6954-3: One LVPECL and two LVDS/CMOS outputsLTC6954-4: Three LVDS/CMOS outputsEach output is individually programmable to divide the input frequency by any integer from 1 to 63, and to delay each output by 0 to 63 input clock cycles. The output duty cycle is always 50%, regardless of the divide number. The LVDS/CMOS outputs are jumper selectable via the OUTxSEL pins to provide either an LVDS logic output or a CMOS logic output.The LTC6954 also features Linear Technology’s EZSync system for perfect clock synchronization and alignment every time.All device settings are controlled through an SPI-compatible serial port.ApplicationsClocking High Speed, High Resolution ADCs, DACs and Data Acquisition SystemsLow Jitter Clock Distribution