74ALVCH16260PAG
Obsolete3.3V CMOS 12-BIT TO 24-BIT MULTIPLEXED D-TYPE LATCH WITH 3-STATE OUTPUTS, BUS-HOLD
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74ALVCH16260PAG
Obsolete3.3V CMOS 12-BIT TO 24-BIT MULTIPLEXED D-TYPE LATCH WITH 3-STATE OUTPUTS, BUS-HOLD
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Technical Specifications
Parameters and characteristics for this part
| Specification | 74ALVCH16260PAG |
|---|---|
| Circuit | 12:24 |
| Current - Output High, Low | 24 mA |
| Delay Time - Propagation | 1 ns |
| Independent Circuits | 1 |
| Logic Type | D-Type Transparent Latch |
| Mounting Type | Surface Mount |
| Operating Temperature [Max] | 85 °C |
| Operating Temperature [Min] | -40 °C |
| Output Type | Tri-State |
| Package / Case | 6.1 mm |
| Package / Case | 0.24 in |
| Package / Case | 56-TFSOP |
| Supplier Device Package | 56-TSSOP |
| Voltage - Supply [Max] | 3.6 V |
| Voltage - Supply [Min] | 2.3 V |
Pricing
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| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
Description
General part information
74ALVCH16260 Series
The 74ALVCH16260 12-bit to 24-bit multiplexed D-type latch is used in applications in which two separate data paths must be multiplexed onto, or demultiplexed from, a single data path. Typical applications include multiplexing and/or demultiplexing address and data information in microprocessor or bus-interface applications. This device also is useful in memory interleaving applications. The 74ALVCH16260 has "bus-hold" which prevents floating inputs and eliminates the need for pull-up/down resistors. The 74ALVCH16260 operates at -40C to +85C
Documents
Technical documentation and resources