72V3622L10PFG8

Obsolete

Renesas Electronics Corporation

IC FIFO SYNC 256X36 120TQFP

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72V3622L10PFG8

Obsolete

Renesas Electronics Corporation

IC FIFO SYNC 256X36 120TQFP

Deep-Dive with AI

DocumentsDatasheet

Specifications Pricing Series Description Documents

Technical Specifications

Parameters and characteristics for this part

Specification	72V3622L10PFG8

Access Time	6.5 ns
Bus Directional	Bi-Directional
Data Rate	100 MHz
Function	Synchronous
FWFT Support	True
Memory Size	9 K
Mounting Type	Surface Mount
Operating Temperature [Max]	70 °C
Operating Temperature [Min]	0 °C
Package / Case	120-LQFP
Programmable Flags Support	True
Retransmit Capability	False
Supplier Device Package	120-TQFP (14x14)
Voltage - Supply [Max]	3.6 V
Voltage - Supply [Min]	3 V

72V3622 Series

256 x 36 x 2 SyncBiFIFO, 3.3V

Part	Programmable Flags Support	Voltage - Supply [Min]	Voltage - Supply [Max]	Supplier Device Package	Bus Directional	Data Rate	Retransmit Capability	Expansion Type	Access Time	Mounting Type	Function	FWFT Support	Memory Size	Package / Case	Operating Temperature [Max]	Operating Temperature [Min]	Current - Supply (Max) [Max]
Renesas Electronics Corporation 72V3622L15PFGI		3 V	3.6 V	120-TQFP (14x14)	Bi-Directional	66.7 MHz		Width	10 ns	Surface Mount	Synchronous		18 K	120-LQFP	70 °C	0 °C	400 mA
Renesas Electronics Corporation 72V3622L10PFG8		3 V	3.6 V	120-TQFP (14x14)	Bi-Directional	100 MHz			6.5 ns	Surface Mount	Synchronous		9 K	120-LQFP	70 °C	0 °C

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

Distributor	Package	Quantity	$

Description

General part information

72V3622 Series

The 72V3622 is a 3.3V version of the 723622. Two independent 256 x 36 dual-port SRAM FIFOs onboard each chip buffer data in opposite directions. Communication between each port may bypass the FIFOs via two 36-bit mailbox registers. The clocks for each port are independent of one another and can be asynchronous or coincident. The enables for each port are arranged to provide a simple bidirectional interface between microprocessors and/or buses with synchronous control.

Documents

Technical documentation and resources