7290820JG8
Obsolete4.75V~5.25V PLCC-84(29.3X29.3) SIGNAL SWITCHES, MULTIPLEXERS, DECODERS ROHS
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7290820JG8
Obsolete4.75V~5.25V PLCC-84(29.3X29.3) SIGNAL SWITCHES, MULTIPLEXERS, DECODERS ROHS
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Technical Specifications
Parameters and characteristics for this part
| Specification | 7290820JG8 |
|---|---|
| Circuit | 1 x 16:16 |
| Independent Circuits | 1 |
| Mounting Type | Surface Mount |
| Operating Temperature [Max] | 85 °C |
| Operating Temperature [Min] | -40 °C |
| Package / Case | 84-LCC (J-Lead) |
| Supplier Device Package | 84-PLCC (29.31x29.31) |
| Type | Multiplexer |
| Voltage - Supply [Max] | 5.25 V |
| Voltage - Supply [Min] | 4.75 V |
| Voltage Supply Source | Single Supply |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| LCSC | N/A | 1 | $ 0.00 | |
Description
General part information
7290820 Series
The 7290820 is a non-blocking digital switch that has a capacity of 2,048 x 2,048 channels at a serial bit rate of 8.192Mb/s, 1,024 x 1,024 channels at 4.096Mb/s, and 512 x 512 channels at 2.048Mb/s. Some of the main features include programmable stream and channel control, Processor mode, input offset delay, and high-impedance output control.
Per-stream input delay control is provided for managing large multi-chip switches that transport both voice channels and concatenated data channels. In addition, input streams can be individually calibrated for input frame offset.
The device is an ST-BUS®compatible digital switch controlled by a microprocessor that can handle from 128 x 128 to 32K x 32K inputs to multiple outputs.
Documents
Technical documentation and resources