
UCC27424DGNRG4
UnknownIC GATE DRVR LOW-SIDE 8MSOP
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UCC27424DGNRG4
UnknownIC GATE DRVR LOW-SIDE 8MSOP
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Technical Specifications
Parameters and characteristics for this part
| Specification | UCC27424DGNRG4 |
|---|---|
| Channel Type | Independent |
| Current - Peak Output (Source, Sink) [custom] | 4 A |
| Current - Peak Output (Source, Sink) [custom] | 4 A |
| Driven Configuration | Low-Side |
| Gate Type | N-Channel, P-Channel MOSFET |
| Input Type | Non-Inverting |
| Logic Voltage - VIL, VIH | 1 V, 2 V |
| Mounting Type | Surface Mount |
| Number of Drivers | 2 |
| Operating Temperature [Max] | 125 °C |
| Operating Temperature [Min] | -40 °C |
| Package / Case | Exposed Pad, 8-TSSOP, 8-MSOP |
| Package / Case [custom] | 0.118 in, 3 mm |
| Rise / Fall Time (Typ) [custom] | 15 ns |
| Rise / Fall Time (Typ) [custom] | 20 ns |
| Supplier Device Package | 8-HVSSOP |
| Voltage - Supply [Max] | 15 V |
| Voltage - Supply [Min] | 4 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
Description
General part information
UCC27424-Q1 Series
The UCC2742x-Q1 family of devices are high-speed dual MOSFET drivers capable of delivering large peak currents into capacitive loads. Two standard logic options are offered: dual inverting and dual noninverting drivers. They are offered in the standard 8-pin SOIC (D) package. The thermally enhanced 8-pin PowerPAD Package MSOP package (DGN) drastically lowers the thermal resistance to improve long-term reliability.
Using a design that inherently minimizes shoot-through current, these drivers deliver 4-A current where it is needed most, at the Miller plateau region, during the MOSFET switching transition. A unique bipolar and MOSFET hybrid output stage in parallel also allows efficient current sourcing and sinking at low supply voltages.
The UCC2742x-Q1 provide enable (ENBL) functions to have better control of the operation of the driver applications. ENBA and ENBB are implemented on pins 1 and 8, which were previously left unused in the industry standard pinout. They are internally pulled up to V DD for active-high logic and can be left open for standard operation.
Documents
Technical documentation and resources