ISPLSI 2064VE-135LB100
ObsoleteLATTICE SEMICONDUCTOR
CPLD ISPLSI® 2000VE FAMILY 2K GATES 64 MACRO CELLS 135MHZ 3.3V 100-PIN CABGA
Deep-Dive with AI
Search across all available documentation for this part.
DocumentsDatasheet
ISPLSI 2064VE-135LB100
ObsoleteLATTICE SEMICONDUCTOR
CPLD ISPLSI® 2000VE FAMILY 2K GATES 64 MACRO CELLS 135MHZ 3.3V 100-PIN CABGA
Deep-Dive with AI
DocumentsDatasheet
Technical Specifications
Parameters and characteristics for this part
| Specification | ISPLSI 2064VE-135LB100 |
|---|---|
| Delay Time tpd(1) Max [Max] | 7.5 ns |
| Mounting Type | Surface Mount |
| Number of Gates | 2000 |
| Number of I/O | 64 |
| Number of Logic Elements/Blocks | 16 |
| Number of Macrocells | 64 |
| Operating Temperature [Max] | 70 °C |
| Operating Temperature [Min] | 0 °C |
| Package / Case | 100-LFBGA |
| Programmable Type | In System Programmable |
| Supplier Device Package | 100-CABGA (10x10) |
| Voltage Supply - Internal [Max] | 3.6 V |
| Voltage Supply - Internal [Min] | 3 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
Description
General part information
ISPLSI 2064VE Series
CPLD ISPLSI® 2000VE FAMILY 2K GATES 64 MACRO CELLS 135MHZ 3.3V 100-PIN CABGA
Documents
Technical documentation and resources