
USBN9604SLB/NOPB
IC CTRLR FULL SPEED 28-LAMCSP
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USBN9604SLB/NOPB
IC CTRLR FULL SPEED 28-LAMCSP
Deep-Dive with AI
Technical Specifications
Parameters and characteristics for this part
| Specification | USBN9604SLB/NOPB |
|---|---|
| Current - Supply | 30 mA |
| Function | Controller |
| Interface | Parallel |
| Operating Temperature [Max] | 70 °C |
| Operating Temperature [Min] | 0 °C |
| Package / Case | 28-TFQFN, CSP |
| Protocol | USB |
| Standards | USB 1.0, USB 1.1 |
| Supplier Device Package | 28-CSP (5.5x4.5) |
| Voltage - Supply [Max] | 5.5 V |
| Voltage - Supply [Min] | 3 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Digikey | Cut Tape (CT) | 1 | $ 8.76 | |
| 10 | $ 7.91 | |||
| 25 | $ 7.54 | |||
| 100 | $ 6.55 | |||
| Digi-Reel® | 1 | $ 8.76 | ||
| 10 | $ 7.91 | |||
| 25 | $ 7.54 | |||
| 100 | $ 6.55 | |||
| Tape & Reel (TR) | 250 | $ 6.26 | ||
| 500 | $ 5.70 | |||
| 1250 | $ 4.97 | |||
| Texas Instruments | SMALL T&R | 1 | $ 7.71 | |
| 100 | $ 6.29 | |||
| 250 | $ 4.94 | |||
| 1000 | $ 4.19 | |||
Description
General part information
USBN9604 Series
The USBN9603/4 are integrated, USB Node controllers. Other than the reset mechanism for the clock generation circuit, these two devices are identical. All references to \x93the device\x94 in this document refer to both devices, unless otherwise noted.
The device provides enhanced DMA support with many automatic data handling features. It is compatible with USB specification versions 1.0 and 1.1, and is an advanced version of the USBN9602.
The device integrates the required USB transceiver with a 3.3V regulator, a Serial Interface Engine (SIE), USB endpoint (EP) FIFOs, a versatile 8-bit parallel interface, a clock generator and a MICROWIRE/PLUS\x99 interface. Seven endpoint pipes are supported: one for the mandatory control endpoint and six to support interrupt, bulk and isochronous endpoints. Each endpoint pipe has a dedicated FIFO, 8 bytes for the control endpoint and 64 bytes for the other endpoints. The 8-bit parallel interface supports multiplexed and non-multiplexed style CPU address/data buses. A programmable interrupt output scheme allows device configuration for different interrupt signaling requirements.
Documents
Technical documentation and resources