The 72V205 is a 256 x 18 First-In, First-Out (FIFO) memory with clocked read and write controls. It is a 3.3V version of the 72205 FIFO and is applicable for a wide variety of data buffering needs, such as optical disk controllers, Local Area Networks (LANs), and interprocessor communication. It has 18-bit input and output ports. The Read Clock (RCLK) can be tied to the Write Clock (WCLK) for single clock operation or the two clocks can run asynchronously of one another for dual clock operation.