5962-9223802 Series

Octal Transparent D-Type Latches with 3-State Outputs

Catalog

Octal Transparent D-Type Latches with 3-State Outputs

Part	Circuit [custom]	Circuit [custom]	Independent Circuits	Package / Case	Current - Output High, Low [custom]	Current - Output High, Low [custom]	Mounting Type	Output Type	Operating Temperature [Min]	Operating Temperature [Max]	Voltage - Supply [Min]	Voltage - Supply [Max]	Delay Time - Propagation	Supplier Device Package	Logic Type
Texas Instruments 5962-9223802M2A	8	8	1	20-LCC	48 mA	15 mA	Surface Mount	Tri-State	-55 °C	125 °C	4.5 V	5.5 V	2 ns	20-LCC (8.89x8.89)	D-Type Transparent Latch

Catalog

Octal Transparent D-Type Latches with 3-State Outputs

Key Features

• Function and Pinout Compatible With FCT and F LogicReduced VOH(Typically = 3.3 V) Versions of Equivalent FCT FunctionsEdge-Rate Control Circuitry for Significantly Improved Noise CharacteristicsIoffSupports Partial-Power-Down Mode OperationESD Protection Exceeds JESD 222000-V Human-Body Model (A114-A)200-V Machine Model (A115-A)1000-V Charged-Device Model (C101)Matched Rise and Fall TimesFully Compatible With TTL Input and Output Logic Levels3-State OutputsCY54FCT573T32-mA Output Sink Current12-mA Output Source CurrentCY74FCT573T64-mA Output Sink Current32-mA Output Source CurrentFunction and Pinout Compatible With FCT and F LogicReduced VOH(Typically = 3.3 V) Versions of Equivalent FCT FunctionsEdge-Rate Control Circuitry for Significantly Improved Noise CharacteristicsIoffSupports Partial-Power-Down Mode OperationESD Protection Exceeds JESD 222000-V Human-Body Model (A114-A)200-V Machine Model (A115-A)1000-V Charged-Device Model (C101)Matched Rise and Fall TimesFully Compatible With TTL Input and Output Logic Levels3-State OutputsCY54FCT573T32-mA Output Sink Current12-mA Output Source CurrentCY74FCT573T64-mA Output Sink Current32-mA Output Source Current

Description

The \x92FCT573T devices consist of eight latches with 3-state outputs for bus-organized applications. When the latch-enable (LE) input is high, the flip-flops appear transparent to the data. Data that meets the required setup times are latched when LE transitions from high to low. Data appears on the bus when the output-enable (OE\) input is low. When OE\ is high, the bus output is in the high-impedance state. In this mode, data can be entered into the latches. The \x92FCT573T devices are identical to the \x92FCT373T devices, except for the flow-through pinout of the \x92FCT573T, which simplifies board design. These devices are fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. The \x92FCT573T devices consist of eight latches with 3-state outputs for bus-organized applications. When the latch-enable (LE) input is high, the flip-flops appear transparent to the data. Data that meets the required setup times are latched when LE transitions from high to low. Data appears on the bus when the output-enable (OE\) input is low. When OE\ is high, the bus output is in the high-impedance state. In this mode, data can be entered into the latches. The \x92FCT573T devices are identical to the \x92FCT373T devices, except for the flow-through pinout of the \x92FCT573T, which simplifies board design. These devices are fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.