Dual D-type flip-flop with set and reset; positive-edge trigger
Dual D-type flip-flop with set and reset; positive-edge trigger
Dual D-type flip-flop with set and reset; positive-edge trigger
| Part | Max Propagation Delay @ V, Max CL | Current - Quiescent (Iq) | Current - Output High, Low [custom] | Current - Output High, Low [custom] | Operating Temperature [Min] | Operating Temperature [Max] | Supplier Device Package | Input Capacitance | Type | Output Type | Trigger Type | Mounting Type | Function | Voltage - Supply [Max] | Voltage - Supply [Min] | Package / Case [custom] | Package / Case [custom] | Package / Case | Clock Frequency | Number of Elements | Number of Bits per Element |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Freescale Semiconductor - NXP | 9.3 ns | 2 µA | 8 mA | 8 mA | -40 °C | 125 °C | 14-TSSOP | 3 pF | D-Type | Complementary | Positive Edge | Surface Mount | Reset Set(Preset) | 5.5 V | 2 V | 0.173 " | 4.4 mm | 14-TSSOP | 115 MHz | 2 | 1 |