5962-9222203 Series

Octal Edge-Triggered D-Type Flip-Flops with 3-State Outputs

Catalog

Octal Edge-Triggered D-Type Flip-Flops with 3-State Outputs

Part	Operating Temperature [Max]	Operating Temperature [Min]	Supplier Device Package	Type	Trigger Type	Mounting Type	Max Propagation Delay @ V, Max CL	Number of Bits per Element	Input Capacitance	Function	Package / Case	Current - Quiescent (Iq)	Number of Elements	Current - Output High, Low [custom]	Current - Output High, Low [custom]	Voltage - Supply [Min]	Voltage - Supply [Max]	Output Type
Texas Instruments 5962-9222203MRA	125 °C	-55 °C	20-CDIP	D-Type	Positive Edge	Through Hole	7.2 ns	8	6 pF	Standard	20-CDIP	1 mA	1	12 mA	32 mA	4.5 V	5.5 V	Non-Inverted Tri-State

Catalog

Octal Edge-Triggered D-Type Flip-Flops with 3-State Outputs

Key Features

• Function, Pinout, and Drive Compatible With FCT and F LogicReduced VOH(Typically = 3.3 V) Versions of Equivalent FCT FunctionsEdge-Rate Control Circuitry for Significantly Improved Noise CharacteristicsIoffSupports Partial-Power-Down Mode OperationMatched Rise and Fall TimesFully Compatible With TTL Input and Output Logic LevelsESD Protection Exceeds JESD 222000-V Human-Body Model (A114-A)200-V Machine Model (A115-A)1000-V Charged-Device Model (C101)Edge-Triggered D-Type Inputs250-MHz Typical Switching RateCY54FCT574T32-mA Output Sink Current12-mA Output Source CurrentCY74FCT574T64-mA Output Sink Current32-mA Output Source Current3-State OutputsFunction, Pinout, and Drive Compatible With FCT and F LogicReduced VOH(Typically = 3.3 V) Versions of Equivalent FCT FunctionsEdge-Rate Control Circuitry for Significantly Improved Noise CharacteristicsIoffSupports Partial-Power-Down Mode OperationMatched Rise and Fall TimesFully Compatible With TTL Input and Output Logic LevelsESD Protection Exceeds JESD 222000-V Human-Body Model (A114-A)200-V Machine Model (A115-A)1000-V Charged-Device Model (C101)Edge-Triggered D-Type Inputs250-MHz Typical Switching RateCY54FCT574T32-mA Output Sink Current12-mA Output Source CurrentCY74FCT574T64-mA Output Sink Current32-mA Output Source Current3-State Outputs

Description

The \x92FCT574T devices are high-speed, low-power, octal D-type flip-flops, featuring separate D-type inputs for each flip-flop. These devices have 3-state outputs for bus-oriented applications. A buffered clock (CP) and output-enable (OE\) inputs are common to all flip-flops. The \x92FCT574T are identical to \x92FCT374T, except for a flow-through pinout to simplify board design. The eight flip-flops in the \x92FCT574T store the state of their individual D inputs that meet the setup-time and hold-time requirements on the low-to-high CP transition. When OE\ is low, the contents of the eight flip-flops are available at the outputs. When OE\ is high, the outputs are in the high-impedance state. The state of OE\ does not affect the state of the flip-flops. These devices are fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. The \x92FCT574T devices are high-speed, low-power, octal D-type flip-flops, featuring separate D-type inputs for each flip-flop. These devices have 3-state outputs for bus-oriented applications. A buffered clock (CP) and output-enable (OE\) inputs are common to all flip-flops. The \x92FCT574T are identical to \x92FCT374T, except for a flow-through pinout to simplify board design. The eight flip-flops in the \x92FCT574T store the state of their individual D inputs that meet the setup-time and hold-time requirements on the low-to-high CP transition. When OE\ is low, the contents of the eight flip-flops are available at the outputs. When OE\ is high, the outputs are in the high-impedance state. The state of OE\ does not affect the state of the flip-flops. These devices are fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.