Catalog
Single Buffer, Open Drain
Key Features
• Advanced Ultra Low Power (AUP) CMOS
• Supply Voltage Range from 0.8V to 3.6V
• 4mA Output Drive at 3.0V
• Low Static power consumption
Description
AI
The Advanced Ultra Low Power (AUP) CMOS logic family is designed for low power and extended battery life in portable applications. The 74AUP1G07 is a single buffer gate with an open drain output designed for operation over a power supply range of 0.8V to 3.6V. The device is fully specified for partial power down applications using IOFF. The IOFFcircuitry disables the output preventing damaging current backflow when the device is powered down.