54HCT240 Series

Military 8-ch, 4.5-V to 5.5-V inverters with TTL-compatible CMOS inputs and 3-state outputs

Catalog

Military 8-ch, 4.5-V to 5.5-V inverters with TTL-compatible CMOS inputs and 3-state outputs

Part	Supplier Device Package	Logic Type	Mounting Type	Voltage - Supply [Min]	Voltage - Supply [Max]	Current - Output High, Low [custom]	Current - Output High, Low [custom]	Output Type	Number of Elements	Package / Case	Operating Temperature [Max]	Operating Temperature [Min]	Number of Bits per Element
Texas Instruments SNJ54HCT240J	20-CDIP	Buffer Inverting	Through Hole	4.5 V	5.5 V	6 mA	6 mA	3-State	2	20-CDIP	125 °C	-55 °C	4

Catalog

Military 8-ch, 4.5-V to 5.5-V inverters with TTL-compatible CMOS inputs and 3-state outputs

Key Features

• Operating voltage range of 4.5V to 5.5VHigh-current outputs drive up to 15 LSTTL loadsLow power consumption, 80µA max ICCTypical tpd = 12 ns±6mA output drive at 5VLow input current of 1µA maxInputs are TTL-voltage compatible3-state outputs drive bus lines or buffer memory address registersOperating voltage range of 4.5V to 5.5VHigh-current outputs drive up to 15 LSTTL loadsLow power consumption, 80µA max ICCTypical tpd = 12 ns±6mA output drive at 5VLow input current of 1µA maxInputs are TTL-voltage compatible3-state outputs drive bus lines or buffer memory address registers

Description

These octal buffers and line drivers are designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. The ’HCT240 devices are organized as two 4-bit buffers/drivers with separate output-enable (OE) inputs. When OE is low, the device passes inverted data from the A inputs to the Y outputs. When OE is high, the outputs are in the high-impedance state. These octal buffers and line drivers are designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. The ’HCT240 devices are organized as two 4-bit buffers/drivers with separate output-enable (OE) inputs. When OE is low, the device passes inverted data from the A inputs to the Y outputs. When OE is high, the outputs are in the high-impedance state.